6.4.4 Wet etching vis-à-vis dry etching
Wet etching is chemical etching where etching takes place in vertical and lateral direction also as shown in Figure 6.8. This is known as undercutting and causes the resultant pattern to be of larger dimensions as compared to that on the mask. To avoid this as we move to smaller feature size we prefer dry etching which is also known plasma etching, sputter etching, reactive ion etching (RIE).
Wet etching is isotropic hence undercutting results but is selective. Dry etching is anisotropic hence there are vertical edges and the resultant pattern is an identical replica of the pattern on the mask but it is non-selective. Hence dry etching effects the mask as well as the underlying layer of the target. In actual practice a compromise has to be made between the two. This compromise is achieved in RIE. Here we have neutral reactive specie and ionized reactive specie. Neutral specie chemically reacts with the target and Ionized specie reacts physically with the target. So we achieve anisotropic etching and selectivity also.
Si3N4 is etched out as shown in the middle diagram of Figure 6.7. In the remaining portion Si3N4 acts like a shield to oxygen atoms and does not allow local oxidation. Once the desired apertures have been formed in Si3N4 layer the fixed KPR is stripped. Next the wafer is put in Oxidation furnace to create Field Oxide 500nm thick through a furnace cycle of 1000°C for 90 minutes in Steam ambient. Field Oxide is formed where underlying oxide pad is exposed to steam. Where Si3N4 is present, no oxidation takes place as shown in the bottom diagram. But we also see the growth of oxide layer underneath the Si3N4 layer at the periphery of oxide layer. This gives rise to Bird’s beak at the periphery. This means oxide grows locally over a larger area than what is defined by the mask. This encroachment by field oxide decreases the active device area hence adversely effects the device density. This problem can be solved by poly- buffered LOCOS process.
Figure 6.7 Field Oxide Growth by LOCOS technique.
6.4.5 Poly-buffered LOCOS
In poly-buffered LOCOS instead of SiO2/Si3N4 stack we use a three-layer stack of SiO2/PolySi/Si3N4.
Two stack process uses SiO2/Si3N4 ≡ 40nm/80nm.
Three stack process uses SiO2/PolySi/Si3N4 ≡ 20nm/ 100nm / 200nm.
SiO2 creates a positive stress and Si3N4 creates a negative stress. The two together create zero stress on the Silicon wafer. If the stress was not relieved during LOCOS then defects would be created in Si Wafer leading to low yield of good IC chips.
Thicker nitride and thinner pad oxide in three stack process provides less of a pathway for lateral diffusion of oxidant. Plus poly Si checks the lateral diffusion of oxidant by getting oxidized itself at the edges during LOCOS. This produces a much sharper transition between the oxidized and un-oxidized regions. This allows for tighter design rules and higher device density.
It is obvious the LOCOS produces non-planar interface between Si/SiO2 interface as shown in Figure 6.9. But this non-planar interface gets smoothened out after several runs of oxidation during fabrication. This has been shown in Figure 6.6