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  1. Home
  2. Finite impulse response
  3. Chapter 1

Chapter 1

OpenStax
@
Tms320c6211 architecture overview
1   Overview of c6211 architecture
2   Core dsp operation
3   Register files
4   Functional units
C62x assembly primer ii
1   Typical assembly operations
2   Loading constants to registers
3   Register moves, zeroing
4   Loading from memory to registers
5   Storing data to memory
6   More on instructions with delay slots
7   Addition, subtraction and multiplication
8   Branching and conditional operations
9   Logical operations and bit manipulation
10   Other assembly instructions
11   C62x instruction set summary
12   Useful assembler directives
13   Assigning functional units
14   Writing the inner product program
15   Pipeline, delay slots and parallel instructions
16   Parallel instructions and constraints
17   Resource constraints
18   Functional unit constraints
19   Cross paths constraints
20   Loads and stores constraints
21   Constraints on register reads
22   Constraints on register writes
23   Ad-hoc software pipelining

Source:  OpenStax, Finite impulse response. OpenStax CNX. Feb 16, 2004 Download for free at http://cnx.org/content/col10226/1.1
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