As is evident from Fig. (6.24) W, the base width, is limited by the resolution of the photolithographic technique which is 10um in 1960s. Also punch through has to be avoided. (Punch through occurs when C-B depletion region overlaps E-B depletion region; at this point excessive current flows and transistor action is lost ). Therefore in lateral transistors W is 5 to 10um. This large W causes a drastic deterioration of short circuit current (β fo ) and transit frequency (ω T )
From our device physics we know that Transit Time = τ transit = W 2 /(2D B ) and β fo = (τ recombination / τ transit )
Also since P doping of emitter (10 17 /cc) and collector (10 17 /cc) is heavier than N doping(10 16 /cc) of the epilayer which is base here, the depletion width extends into base region predominantly. This causes δW/δV CB to be significant which leads to significant Early Effect hence h ob and h oe (or g c and g o ) are large (the slope of I-V characteristics is large) But here BV EBO = BV CBO high is quite high.
Because of poor performance parameters of lateral transistors, the latter are fully avoided for high frequency applications. But in low frequency applications (typically below 1 MHz ) a mix of n-p-n and lateral p-n-p can give very favorable performance characteristics. Therefore such a mix is used in uA 741.
Section 6.10 Breakdown voltages of n-p-n transistor in MC1530
Referring to the doping profile of n-p-n transistor in Fig. (6.17) it is seen that
background doping of the epi-layer is N BC = 1.2 × 10 16 (cm -3 )
and N’ B = 1.8 × 10 17 (cm -3 ), emitter doping is N E =1.0 X 10 20 (cm -3 ) and W = 0.7 um.
Therefore
BV CBO (determined by N BC ) = 55V.
BV EBO (determined by N B ’) = 7V.
BV CEO = BV CBO / (β o ) 1/MillerIndex = 23V
[Substrate pnp transistor :- Here p substrate is used as collector and n epilayer is used as base and p layer, for the base diffusion in npn transistor, is used as emitter. Since here W depends upon diffusion depths therefore much better performance parameter as compared to lateral pnp can be achieved. But substrate pnp can be used only in CC configuration.]
Doping profile of pnp transistor is given in Fig. (6.25)
As is evident from Fig. (6.25)
N B ’ = N BC
Therefore BV CBO = BV EBO = 55v.
Therefore if lateral pnp transistor is used in the input circuit of Op-Amp (as it is done in uA741 ) a much larger V id (differential mode signal ) can be handled by the Op-Amp.
Section 6.11 Design Considerations in the circuit layout of MC1530/31.
We have already seen the fabrication steps involved in the manufacture of MC 1530 or MC 1531. Now we will examine the design considerations involved in the circuit layout of MC -1530 on the silicon chip. MC-1530 and MC-1531 are identical circuits except for the input differential stage. MC-1530 is a direct input to a differential stage with R id = 10K whereas MC-1531 is a darlington pair input to the differential stage with R id = 1M.
We have already seen that N epi layer of the isolated island forms the collector of the transistor or the anode of the diode. ( We have shown in Sec. 6.5 that transistor is used in diode configuration by shorting collector to base). Therefore N epi layer of any isolated island will always be at some positive potential as dictated by d.c. quiescent condition of the circuit. These positive potentials set the proper operating condition of the circuit as well as they help isolate the components from the substrate and from one another.