Sspd_chapter 7_syllabus of cmos digital vlsi design

EC1XXXX_Elective III_CMOS Digital VLSI Design[3-1-0]

Introduction to IC Technology- Introduction to IC Technology, MOS and related VLSI technology, basic MOS Transistors(enhancement and depletion mode), NMOS process, CMOS process(P-well, N-well and twin-tub), BICMOS process flow, aspects of CMOS and BiCMOS devices. 6 L

Basic Electrical Properties of MOS Circuits – MOSFET Threshold Voltage, I-V relationships for MOSFET, MOSFET Transconductance, the pass transistor, NMOS inverter, pull-up to pull-down ratio for NMOS inverter driven by NMOS inverter and pass transistor, different forms of pull-up(load resistor, depletion mode NMOS, enhancement mode pull up, CMOS pull up), CMOS Inverter, MOS transistor circuit model, Latch-up in CMOS circuits, BICMOS Inverter, Comparative aspects of CMOS and BiPolar Transistors. 7 L

MOS circuit design processes – MOS layers, stick diagrams(NMOS design style, CMOS design style), Euler Path and Design Optimization, Design rules and layout (Lambda-based design rules, contact cuts, double metal MOS process rules, CMOS – lambda based design rules), 2 micron double metal double poly CMOS rules. 5 L

Basic circuit concepts – sheet resistance, area capacitance of layers, inverter delays, driving large capacitive loads, propogation delays (cascaded pass transistor, design of long polysilicon wires), wiring capacitances (fringing fields, interlayer capacitance, peripheral capacitance) 6 L

Scaling of MOS Circuits – scaling models and scaling factors (gate area, gate capacitance, channel current density, channel resistance, gate delay, maximum operating frequency, saturation current, current density, power dissipation), limitations of scaling. 4 L

Subsystem design and layout – Switch logic ( pass transistors and transmission gates), Gate logic ( inverter, 2-input CMOS NAND and NOR gates), structured design of a parity generator. 4 L

Memory and aspects of system timing – System timing consideration, 1-transistor dynamic memory cell, 3-transistor dynamic RAM cell area, dissipation, volatility), RAM arrays. 4 L

Practical aspects – Optimization of NMOS and CMOS inverters, I/O pads, aspects of design tools (graphical entry layout, design verification, design rule checkers, circuit extractors, simulators). 4 L.

Text books: i. Basic VLSI Design – Pucknell and Eshraghian;

ii. VLSI Fabrication principles – Sorab Gandhi;

Reference books: i. The science and engineering of Microelectronic Fabrication – Stephen Camplell;

ii. VLSI Design – Sujata Pandey and Manoj Pandey;

iii. CMOS VLSI Design – Wolfe.