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In many cases, depending on the result of previous
operations, you execute the branch instructionconditionally. For example, to implement a loop, you
decrement the loop counter by 1 each time you run a set ofinstructions and whenever the loop counter is not zero, you
need to branch to the beginning of the code block to iteratethe loop operations. In the C6x CPU, this conditional
branching is implemented using the
conditional
operations . Although
B
may be
the instruction implemented using conditional operationsmost often, all instructions in C6x can be conditional.
Conditional instructions are represented in code by using
square brackets,
[ ]
, surrounding the
condition register name. For example, the following
B
instruction is executed only if
B0
is nonzero:
1 [B0] B .L1 A0
To execute an instruction conditionally when the condition
register is zero, we use ! in front of the register. Forexample, the
B
instruction is executed
when
B0
is zero.
1 [!B0] B .L1 A0
Not all registers can be used as the condition registers.
In the C62x and C67x devices, the registers that can be tested in conditionaloperations are
B0
,
B1
,
B2
,
A1
,
A2
.
(Simple loop): Write an assembly program computing the summation $\sum_{n=1}^{100} n$ by implementing a simple loop.
The logical operations and bit manipulations are
accomplished by the
AND
,
OR
,
XOR
,
CLR
,
SET
,
SHL
, and
SHR
instructions.
Other useful instructions include
IDLE
and compare instructions such as
CMPEQ
The set of instructions that can be performed in each functional unit is as follows (See [link] , [link] , [link] and [link] ). Please refer to TMS320C62x/C67x CPU and Instruction Set Reference Guide for detailed description of each instruction.
Instruction | Description |
---|---|
ADD(U) |
signed or unsigned integer addition without saturation |
ADDK |
integer addition using signed 16-bit constant |
ADD2 |
two 16-bit integer adds on upper and lower register halves |
B |
branch using a register |
CLR |
clear a bit field |
EXT |
extract and sign-extend a bit field |
MV |
move from register to register |
MVC |
move between the control file and the register file |
MVK |
move a 16-bit constant into a register and sign extend |
MVKH |
move 16-bit constant into the upper bits of a register |
NEG |
negate (pseudo-operation) |
NOT |
bitwise NOT |
OR |
bitwise OR |
SET |
set a bit field |
SHL |
arithmetic shift left |
SHR |
arithmetic shift right |
SSHL |
shift left with saturation |
SUB(U) |
signed or unsigned integer subtraction without saturation |
SUB2 |
two 16-bit integer integer subs on upper and lowerregister halves |
XOR |
exclusive OR |
ZERO |
zero a register (pseudo-operation) |
Instruction | Description |
---|---|
ABS |
integer absolute value with saturation |
ADD(U) |
signed or unsigned integer addition without saturation |
AND |
bitwise AND |
CMPEQ |
integer compare for equality |
CMPGT(U) |
signed or unsigned integer compare for greater than |
CMPLT(U) |
signed or unsigned integer compare for less than |
LMBD |
leftmost bit detection |
MV |
move from register to register |
NEG |
negate (pseudo-operation) |
NORM |
normalize integer |
NOT |
bitwise NOT |
+OR |
bitwise OR |
SADD |
integer addition with saturation to result size |
SAT |
saturate a 40-bit integer to a 32-bit integer |
SSUB |
integer subtraction with saturation to result size |
SUBC |
conditional integer subtraction and shift - used for division |
XOR |
exclusive OR |
ZERO |
zero a register (pseudo-operation) |
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