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Some of the logical solutions for overcoming the Interconnect bottleneck are:

  1. More levels of interconnect. We had to resort to 7to 8 levels of metallization at 100nm Node.
  2. Hierarchy of design rules for local, semi-local and global routing.
  3. Once the practical limits have been achieved we can further improve by going for Copper interconnects and low refractory index dielectric materials for higher propogation velocity. These dielectrics could be organic or aerogols.

7.7.10. Thermal Management due to excessive heating consequent to scaling.

Scaling reduces power dissipation per Gate but scaling increases the number of gates per chip. This coupled with higher speed scales up Chip Power Dissipation. Therefore Thermal Management becomes the central theme of Advanced Electronic Systyems.

In 1960, we had SSI chips which dissipated 0.1W to 0.3W per chip. These were cooled by Air and Liquid Cooling Techniques.

In 1980 we had BJT LSI and CMOS VLSI chips which dissipated 1 to 5W.

In 1990 CMOS VLSI were dissipating 15 to 30 W of heat.

CMOS μP chips at 1 to 2 W level were managed by heat sinks and heart spreaders.

When the dissipation level reached 2 to 3 W/cm 2 totalling to 300W at substrate level in multi-chip modules there we went for Liquid cooling.

Water cooled multi-chip modules evolved to refined indirect liquid cooling designs.

In 1990, third generation cooling modules were introduced which could handle 2 to 5kW dissipation in 225 to 1000cm 2 footprint.

7.7.10.1.Methods of Cooliing .

Some of the popular methods of cooling which were adopted were:

  1. Compact heat exchangers;
  2. Miniature refrigerators in Si – cooling system was imntegrated with the chip.
  3. Direct liquid cooling of bare chips.
  4. Chip packages in dielectric liquid;
  5. In late 1980s, low cost , air-cooled multi-chip modules became popular. These had spatial and volumetric cooling facilities.
  6. Water cooled modules were also developed.

The method of cooling was categorized according to the product categories.

  • Low cost electronic systems costing less than $300 had bouyance, induced natural circulation of air method of cooling.
  • Handheld equipments costing less than $1000 had heat spreaders. This would suffice for 1 to 2 W ICs.
  • Desktop and note-books computers costing less than $3000 had several options.
    • One option was heat sink with air-cooling.
    • Second option was cooling by remotely located fans.
    • Third option was Fan cooled heat sinks.
    • Fourth was natural convecting air, circulating past low-fin heat sinks, heat pipes and metal cases. This sufficed for 3 to 5W per chip dissipation.
  • High performance Systems costing more than $3000 had forced cooling systems.
  • The harsh environment had still more elaborate methods of cooling.

By 1997, IC power dissipation reached 100 to 150 W heatdissipation. Chip back side is allocated to heat removal. The heat removal may be done by any one of the following methods:

  • Conducting away the heat through solids with high thermal conductivity;
  • Through convection the heat is removed;
  • Through pumped liquid transport.
  • Throuugh Vapour diffusion.

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Source:  OpenStax, Solid state physics and devices-the harbinger of third wave of civilization. OpenStax CNX. Sep 15, 2014 Download for free at http://legacy.cnx.org/content/col11170/1.89
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