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SSPD_Chapter 6_IC Fabrication Technology from 1960s to date (2011)_Part3.
The tortuous path and the challenges in the development of IC Fabrication Technology.
Gordon Moore predicted that number of transistors on integrated circuits (a rough measure of computer processing power) will double every 18 months at a minimum cost. It became a self fulfilling prophecy . Moore’s Law has become a yardstick of our progress as we harness the cunning of NATURE’s design strategies.
There was a constant pressure on Chip manufacturers to integrate functionally complex chips. To meet this target it became a necessity to follow Moore’s Law of micro-miniaturization. Following this law through aggressive vertical and lateral scaling rapid advances took place and major milestones were established in the field of IC Technology as already mentioned in the Road Map of Computer Development.
In 1964 the third generation Computer using IC came into market. This was known as Table-Top Computer PDP-8 . This was compact. There was much less power requirement and much more cost affordable.
In 1971 the first microprocessor chip (µP4004) was marketed by INTEL . This laid the foundation of Desk-Top computers belonging to Fourth Generation Computers.
µP4004 was followed by 8085, 8086, 80386, 80486, Pentium I, Pentium II, Pentium III and Pentium IV. Today in 2009 such powerful quad processors have been commercialized that Nvidia advertises its new workstation, the Tesla, as a “personal supercomputer”. It clusters 4 Nvidia C1060 processing boards, each of which unites 240 graphic cores to process instructions at nearly teraflop speed.
Table 6.6. Transistor Junction Depths and Doping Changes with years. [Muller&Kamini, Solid State Devices; “Modelling of SiGe heterojunction transistors:200GHz frequencies with symmetrical delay times”, Jochen Eberhardt&Erich Kasper, Solid State Electronics, 45(2001), 2097-2100.].
| Amplifying(Junction. Isolated)1964 | Amplifying(Junction Isolated)1980 | Switching(Junction Isolated)1980 | Switching(Oxide Isolated)1980 | Amplifying(oxide isolated)2001HBT | |
| Surface area | 212.5µm×250µm | 20 µm×1µm | |||
| Epi Film Thickness_Resistivity of epi layer | 10 μm_0.1Ω-cm | 10μm_1Ω-cm | 3μm_0.3-0.8 Ω-cm | 1.2um_0.3-0.8 Ω-cm | 172nmW C = 50nm |
| Buried Layer Sheet R Sheet Updiffusion | 1Ω/▄_2.5 μm | 20Ω/▄_2.5μm | 20Ω/▄_1.4μm | 30 Ω/▄_0.3 μm | 0.7 Ω/▄_0.2 μm |
| Emitter Diffusion Depth_Sheet Resistance of Emitter | 2.5 μm_1Ω/▄ | 2.5μm_5Ω/▄ | 0.8μm_12Ω/▄ | 0.25μm_30Ω/▄ | W E = 110nm_378 Ω/▄_Emitter contact_5.2 Ω/▄ |
| Base Diffusion Depth_R SHEET | 3.5 μm_200Ω/▄ | 3.25μm_100 Ω/▄ | 1.3μm_200 Ω/▄ | 0.5μm_600 Ω/▄ | 122nm260 Ω/▄ |
| Base Width | 1 μm | 1 μm | 0.5 μm | 0.25 μm | W B =12nm |
| Substrate ResistivityCrystal Orientation | 10 Ω-cm<111> | 10 Ω-cm<111> | 10 Ω-cm<111> | 5 Ω-cm<111> |
Table 6.7. Dimension Scaling in MOSFET over the last decade.
| MOS | 1967 | 1997 | 1999 | 2001 | 2003 | 2006 |
| L(µm) | 10 | 0.25 | 0.18 | 0.13 | 0.1 | 0.07 |
| DRAM (Gbit/cm 2 ) | 64M | 0.18 | 0.38 | 0.42 | 0.91 | 1.85 |
| Junction Depth (x j )nm | 1000 | 100 | 70 | 60 | 52 | 40 |
| InterconnectionPitch(nm) | 2000 | 600 | 500 | 350 | 245 | 130 |
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