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This laboratory gives examples of the uses of the ADC types available in the hardware development kits. A different laboratory is developed for each kit, taking into account that both the ADC10 and the SD16_A laboratories implement a temperature data logger. The ADC12 laboratory also uses operational amplifiers to perform the analogue signal conditioning.
This laboratory ( Lab4_ADC.c ) analyses Comparator_A operation. A voltage is applied to one of the Comparator’s inputs, generated either by the DAC12 or by other external source. Whenever the external voltage value is higher than the comparison value internally generated, an interrupt is generated that switches the LED state.
The resources used by the application are:
- DAC12;
- Comparator_A;
- Digital IO;
- Timer_A.
The application starts by stopping the Watchdog Timer.
Timer_A is configured to generate an interrupt once every msec, and updates the DAC12 output in order to provide a ramp signal.
The Comparator_A’s output is configured to be accessible at pin P6.6, which is available on Header 4 pin 7. The signal applied to CA0 input is compared with 0.5 V cc internal reference voltage. Every time that a compare match occurs, an interrupt is requested and switches the state of LED1.
Configure the registers in order to receive the external signal at the CA0 input and compare it with the internal reference 0.5 V cc . Enable the comparator with an interrupt triggered on a low-to-high transition of the comparator output.
CACTL1 = CAON | CAREF_2 | CARSEL | CAIE; // Enable comp, ref = 0.5*Vcc
CACTL2 = P2CA0; // Pin to CA0P2DIR |= 0x042; // P2.1 and P2.6 output direction
P2SEL |= 0x040; // P2.1 = LED1 and P2.6 = CAOUTCACTL1 |= CAIE; // Setup interrupt for Comparator
//*********************************************************// Comp_A interrupt service routine -- toggles LED
//*********************************************************#pragma vector=COMPARATORA_VECTOR
__interrupt void Comp_A_ISR (void){
CACTL1 ^= CAIES; // Toggles interrupt edgeP2OUT ^= 0x02; // Toggle P2.1
}
ADC12CTL0 = REF2_5V + REFON; // Internal 2.5V ref on
DAC12_0DAT = 0x00; // DAC_0 output 0V
DAC12_0CTL = DAC12IR | DAC12AMP_5 | DAC12ENC;
// DAC_0->P6.6
// DAC reference Vref// 12 bits resolution
// Imediate load// DAC full scale output
// Medium speed/current// Straight binary
// Not grouped
// Compare mode
TAR = 0; // TAR resetTACCR0 = 13600; // Delay to allow Ref to settle
TACCTL0 |= CCIE; // Compare-mode interruptTACTL = TACLR + MC_1 + TASSEL_2; // up mode, SMCLK
// Interrupt enableTAR = 0; // TAR reset
TACCTL0 = CCIE; // CCR0 interrupt enabledTACCR0 = 32; // 1 msec counting period
TACTL = TASSEL_1 | MC_1 | ID_0; // ACLK, up mode//*********************************************************
// ISR to TACCRO from Timer A//*********************************************************
#pragma vector=TIMERA0_VECTOR__interrupt void TimerA0_ISR (void)
{DAC12_0DAT++;
if (DAC12_0DAT == 0xFFF)
DAC12_0DAT = 0;if (flag == 1) // if flag active exit LPM0{
flag = 0;LPM0_EXIT;
}}
The experimental verification of this laboratory can be accomplished by connecting the DAC12’s output, available on Header 8 pin 7, to the Comparator_A’s input CA0, available on Header 4 pin 7.
Observe the signals wave form at the Comparator_A’s input and output using an oscilloscope. The LED1 switches state whenever the input’s voltage value is lower than the compare value.
This example and many others are available on the MSP430 Teaching ROM.
Request this ROM, and our other Teaching Materials here (External Link)
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