US - CA - Newport Beach
May 23, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Salinas
May 23, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Lodi
May 23, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Costa Mesa
May 23, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - La Puente
May 23, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Oceanside
May 23, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Los Angeles
May 23, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Hesperia
May 23, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Apple Valley
May 23, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...
US - CA - Indio
May 23, 2024
Key responsibilities: 5+ years of working experience in Design verification. Pre-Silicon IP validator for USB IP The works involved subsystem-level verification. Knowledge in test plan writing, writing tests in UVM and System Verilog, Able to debug RTL issues, coverage writing and SVA, waveform...