1.6 Memory management  (Page 6/11)

System 370 example: 24-bit virtual address space, 4 bits of segment number, 8 bits of page number, and 12 bits of offset. Segmenttable contains real address of page table along with the length of the page table (a sort of bounds register for the segment). Page table entries are only12 bits, real addresses are 24 bits.

• If a segment is not used, then there is no need to even have a page table for it.
• Can share at two levels: single page, or single segment (whole page table).

Pages eliminate external fragmentation, and make it possible for segments to grow without any reshuffling.

If page size is small compared to most segments, then internal fragmentation is not too bad.

The user is not given access to the paging tables.

If translation tables are kept in main memory, overheads could be very high: 1 or 2 overhead references for every realreference.

Another example: VAX.

• Address is 32 bits, top two select segment. Three base-bound pairs define page tables (system, P0, P1).
• Pages are 512 bytes long.
• Read-write protection information is contained in the page table entries, not in the segment table.
• One segment contains operating system stuff, two contain stuff of current user process.
• Potential problem: page tables can get big. Do not want to have to allocate them contiguously, especially for large user processes. Solution:
  • System base-bounds pairs are physical addresses, system tables must be contiguous.
  • User base-bounds pairs are virtual addresses in the system space. This allows the user page tables tobe scattered in non-contiguous pages of physical memory.
  • The result is a two-level scheme.

In current systems, you will see three and even four-level schemes to handle 64-bit address spaces.

Translation buffers and inverted page tables

Problem with segmentation and paging: extra memory references to access translation tables can slow programs down by a factor oftwo or three. Too many entries in translation tables to keep them all loaded in fast processor memory.

We will re-introduce fundamental concept of locality: at any given time a process is only using a few pages or segments.

Translation lookaside buffer

Solution: Translation Lookaside Buffer (TLB). A translation buffer is used to store a few of the translation table entries. Itis very fast, but only remembers a small number of entries. On each memory reference:

• First ask TLB if it knows about the page. If so, the reference proceeds fast.
• If TLB has no info for page, must go through page and segment tables to get info. Reference takes a long time, but give the info for this pageto TLB so it will know it for next reference (TLB must forget one of its current entries in order to record new one).

TLB Organization: Show picture of black box. Virtual page number goes in, physical page location comes out. Similar to acache, usually direct mapped.

TLB is just a memory with some comparators. Typical size of memory: 128 entries. Each entry holds a virtual page number and thecorresponding physical page number. How can memory be organized to find an entry quickly?