4.1 Laboratory timers: lab2 - real time clock with basic timer1

Laboratory timers: lab2 - real time clock with basic timer1

Introduction

Correct system timing is a fundamental requirement for the proper operation of a real-time application. The timing definition can dictate how the data information processed during the execution of the application program. The clock implementations vary between devices in the MSP430 family. Each device provides different clock sources, controls and uses. This chapter discusses the clock controls included in the platforms used. The MSP430 4xx family has two general-purpose 16-bit or 8-bit counters and event timers, named Timer_A, Timer_B, and a Basic Timer. The Basic Timer module is only implemented in ‘4xx devices. The 2xx device family also has Timer_A and Timer_B, but the clock signals are provided by the basic clock module+.The timers may receive an internal or external clock. Timer_A and Timer_B also include multiple independent capture and compare blocks, with interrupt capabilities.

Overview

The Real Time Clock (RTC) has a 32-bit counter, to automatically control the clock calendar. This peripheral is present on the MSP430FG461x devices. The application developed in the laboratory Timers: Lab1 - Memory clock with Basic Timer1 will now be modified to incorporate this module.

Resources

This application ( Lab2_Timers.c ) is based on the same resources used in the laboratory Timers: Lab1 - Memory clock with Basic Timer1 . In addition, there is an additional RTC peripheral and two push buttons, SW1 and SW2. The first module works in automatic mode to manage the clock calendar, while the push buttons switch the information displayed on the LCD between the clock and calendar.

Software application organization

The organization of the software is identical to that of laboratory Timers: Lab1 - Memory clock with Basic Timer1 . The Basic Timer1, LCD and LEDs continue to perform the same functions. They are configured similarly, but with the changes described below.

In routine main() , the configurations for RTC and SW1/SW2 are added.

The memory addresses corresponding to the clock calendar values are initialized with the default values, that is zero hours, zero minutes and zero seconds, on August 9, 2008. The RTC is then activated in calendar mode, with the interrupt disabled. This mode affects the Basic Timer1 operation.

The switches SW1 and SW2 are connected to the microcontroller ports P1.0 and P1.1 respectively. Hence, these ports are configured as inputs and their interrupts activated by a high-to-low transition at the input.

System configuration

Real time clock configuration

The RTC is configured in calendar mode and enabled. The counting registers provide the values of seconds, minutes, hours, days, day of the week, day of the month, month and year. The registers are stored in BCD format to speed up the data writing process to the LCD. The interrupt for this peripheral should be disabled (disabling the Basic Timer1 interrupt). Given these objectives:

RTCCTL = RTCBCD | RTCHOLD | RTCMODE_3; // BCD mode, RTC and BT disable

The RTC operation in calendar mode automatically configures some of the Basic Timer1 features. The content of the bits BTSSEL, BTHOLD and BTDIV of BTCNT register are ignored. Thus, the BTCNT1 and BTCNT2 counters work in cascade. The clock source of the BTCNT1 counter is the ACLK clock signal. The output of the BTCNT1.Q7 counter is selected as the input of the BTCNT2 counter (frequency: ACLK/256). The RTC uses the BTCNT2.Q6 output as clock source (frequency: ACLK/32768).

Basic timer1 configuration

This peripheral is automatically configured with the RTC in calendar mode. To enable the interrupt once every 0.5 seconds:

BTCTL = BT_fCLK2_DIV64; // (ACLK/256)/64 IE2 |= BTIE; // Enable BT interrupt with 0.5 period

Ports p1.0 and p1.1 configuration

The switches SW1 and SW2 are connected to ports P1.0 and P1.1 respectively. How should the following registers be configured in order to set just the bits that affect the digital inputs, with high-to-low transition interrupts?

P1SEL&= ~0x03; // P1.0 and P1.1 I/O ports P1DIR&= ~0x03; // P1.0 and P1.1 digital inputs P1IFG = 0x00; // Clear P1 flagsP1IES&= ~0x03; // high-to-low transition interrupts P1IE |= 0x03; // enable port interrupts

Analysis of operation

Isr execution time

Performing similar procedures to those described in laboratory Timers: Lab1 - Memory clock with Basic Timer1 measure the ISR execution time. What is the value measured?

LCD refresh: ______

The LCD write routines were changed. Taking advantage of storing the data in the BCD format, the division operation can be ignored, resulting in the reduction of execution time of the Basic Timer1 ISR. Is the processing time required to refresh the LCD constant? _____

Measurement of electrical current drawn

The power consumption was discussed in the previous point. The electrical power required by the system during operation is measured by replacing the jumper on the Header PWR1 by an ammeter, which indicates the electric current taken by device during operation.

What is the value read? __________

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