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Using the MSP-EXP430FG4618 Development Tool implement a flash memory programming with the CPU executing the code in RAM.

Laboratory flash memory: lab2 - flash memory programming with the cpu executing the code in ram


The TI MSP430 has an internal flash memory that can be used for data storage. Two different methods of writing to the flash memory are studied in this laboratory. The first method requires the CPU execution of the code resident in flash memory. The consequences of this procedure are discussed. In the second part of the laboratory, the flash write and erase operations are conducted with the CPU executing the code resident in RAM. The important details are highlighted.


This laboratory programs the internal flash memory with the CPU executing the code in RAM. It requires to configure: - Several flash storage management routines; - Check the state of the flag Wait; an the - Flash write routine. This procedure requires special attention during the project construction. The application begins copying the routines from flash to RAM. Directive MEMORY: Device's memory configuration. Identifies the memory ranges that are physically present on the device Directive SECTIONS: controls how the sections are built and reserved.

The execution time of the different operations can be obtained with an oscilloscope connected on pin 2 of the Header 4 or analyzing the state of the LED (digital output P2.1).


The tasks developed in the Lab1: Flash memory programming with the CPU executing the code from flash memory are executed again during this laboratory. The difference this time is that the software runs from RAM.

This process requires special procedures. The routines to run from RAM must be identified. The application must begin by copying the routines from flash to RAM.

The directive MEMORY determines the device's memory configuration. The memory can be organized in accordance with the system needs. This directive identifies the memory ranges that are physically present on the device. Each of these ranges has a set of features, such as:

- Name;

- Initial address;

- Length;

- Optional attributes set;

- Optional filling specifications.

The directive Memory is organized as described below.

MEMORY {name 1 [(attr)] : origin = constant, length = constant [, fill = constant]name n [(attr)]: origin = constant, length = constant [, fill = constant] }

The directive SECTIONS controls how the sections are built and reserved. The directive performs the following:

- Describes how the input sections are related to the output sections;

- Defines the output sections in the executable program;

- Defines where the output sections are placed in memory;

- Allows changing the name of the output sections;

The directive SECTIONS is organized as described below.

SECTIONS {name : [property [, property] [, property]. . . ] name : [property [, property][, property] . . . ]name : [property [, property] [, property]. . . ] }The following directives are possible:// Reserve memory space to load the section: Syntax: load = allocation orAllocation or>allocation// Define the memory space where the code belonging to the section will run:Syntax: run = allocation or run>allocation

In this project, we intend to write the code to the flash memory, but we want it to be executed from RAM. The Linker offers a very simple way to accomplish this task. A memory space where the code is stored is associated with another memory space where it will run. The application transfers the code to the memory space, where it will be executed.

The memory spaces needed to store the routines are defined in the lnk_msp430fg4618_RAM.cmd file.

RAM_MEM : origin = 0x1100, length = 0x0200 FLASH_MEM : origin = 0x3100, length = 0x0200

The following sections are also defined:


Software application organization

The software for this laboratory has the same structure as the Lab1: Flash memory programming with the CPU executing the code from flash memory .

The directive #pragma CODE_SECTION (symbol, "section name") reserves space for the " symbol " in a section called " section name ". Thus, the routines are stored in the section " .FLASHCODE ".

The routine copy_flash_to_RAM runs from the beginning of the program. It is responsible for transferring the flash contents to RAM.

The files ( Lab2_Flash.c ) and lnk_msp430fg4618_RAM.cmd must be included during the compilation.

Now, the code is executed from RAM. Check, whenever appropriate, the Wait bit state of the register FCTL3.

System configuration

Flash storage management routines

To store the flash management routines in the section ".FLASHCODE" complete the empty spaces:

#pragma CODE_SECTION(erase_segment,".FLASHCODE") void erase_segment(int address)#pragma CODE_SECTION(write_char_flash,".FLASHCODE")void write_char_flash(int address, char value)#pragma CODE_SECTION(write_int_flash,".FLASHCODE") void write_int_flash(int address, int value)#pragma CODE_SECTION(copy_seg_flash,".FLASHCODE")void copy_seg_flash(int address_source, int address_destination)

Check the flag wait

At software key points, and whenever writing or erasing the flash memory, perform a delay before proceeding with the data writes. Complete the following line of code in order to suspend the program flow while the busy flag is not active.

while(FCTL3&BUSY); // Check BUSY flag

Analysis of operation

Analyse the differences between the different versions of the routines. Note that successive delays are placed in the versions to be executed from RAM.

This example and many others are available on the MSP430 Teaching ROM.

Request this ROM, and our other Teaching Materials here (External Link)

Questions & Answers

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Source:  OpenStax, Teaching and classroom laboratories based on the “ez430” and "experimenter's board" msp430 microcontroller platforms and code composer essentials. OpenStax CNX. May 19, 2009 Download for free at http://cnx.org/content/col10706/1.3
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