SSPD_Chapter 7_Part 6_Basic Circuit Concepts_continued2
7.6.3. Charging and discharging delay in CMOS.
Like all the Logic Gates, MOS Logic also experiences propogation delay which results in the degradation of the toggle rate og CMOS gates. In order to minimize this degradation it is important to quantitatively analyze the propogatioon delay.
In Figure 7.6.3.1. we have a NMOS being driven through a NMOS Pass Transistor by V DD magnitude Step Voltage where V DD has a magnitude of 5V.
As seen in the Figure 7.6.3.1, a 5V step input results in exponentially growing Gate Voltage. With a time-dealay of τ = RC , Gate Voltage rises to 0.63×5V. This is evident from the charging equation given in the diagram.
Here R = resistance of the n-channel of pass transistor under ON condition
=Sheet Resistance of the channel×(L channel /W channel )=R channel ;
From Table 4.6.1, for 5μm Generation Technology R sheet of n-channel = 10 4 Ω/□ and
L channel = 2λ and W channel = 2λ.
Therefore R chanel = 10kΩ×(2λ/2λ)= 10kΩ;
C = gate-to-channel area capacitance = C g = area of the gate×□C gate-to-channel =0.01pF from the Table 7.6.3 for 5μm Generation.
Hence
For 5μm Generation charging time constant = R chanel × C g = 10kΩ×0.01pF =τ = 0.1nsec;
For 2μm Generation charging time constant = R chanel × C g = 20kΩ×0.0032pF
=τ = 0.064nsec;
For 1.2μm Generation charging time constant = R chanel × C g = 20kΩ×0.0023pF
=τ = 0.046nsec;
In Table 7.6.3.1 these delays for different generations are tabulated.
Table 7.6.3.1. Delay Time Calculation for 5μm, 2μm and 1.2μm Generations.
| Generation | R channel | C gate | τ charging | τ transit |
| 5μm | 10kΩ | 0.01pF | 0.1nsec | 0.13nsec |
| 2μm | 20kΩ | 0.0032pF | 0.064sec | 0.04nsec |
| 1.2μm | 20kΩ | 0.0023pF | 0.046nsec | 0.03nsec |
In Basic Electrical Properties Chapter 7.3, Equation 7.3.7, the transit time through the channel is given by the equation:
Where L = 5/2/1.2μm, μ n = 650cm 2 /(V-sec), V ds = average of V DD = 3V/1.5V/0.75V
By taking the values of the parameters in Equation 7.3.7 we arrive at the transit time tabulated in Table 7.6.3.1.
By inspection of Table 7.6.3.1 we find that with scaling the charging delay decreases and speed performance correspondingly improves.
Since time constant of charging and transit time are nearly equal they are interchangeably used and it is also used as the fundamentl time unit. All timings in a system can be assessed in terms of charging time constant.
To account the variation in the parameters of the devices, we always take the worst case scenario namely 0.3nsec for 5μm Generation, 0.2nsec for 2μm Generation and 0.1nsec for 1.2μm Generation.
We conclude that standard delay unit = τ = R □ (sheet resiatance of the n-channel)×□C g ;