Epitaxy process steps in manufacture of MC 1530.
- SiO 2 layer, which was used as a mask for buried layer diffusion, is completely etched away using HF (hydrofluoric acid) as an etchant.
- The cleared wafers are placed on the boat and moved into the reaction chamber.
- The system is closed and N 2 admitted to flush out the air.
- H 2 is passed through the chamber at the rate of 30 liters/min.
- RF heating is turned on and substrate wafers are maintained at 1200°C ± 2°C.
- When the temperatures have been stabilized, HCl is admitted. H 2 : HCl ≡ 100: 1. HCl etches away 3 µm of the substrate surface in 6 minutes.
- At this point HCl turned off and SiCl 2 and phosphine turned on.
H 2 : SiCl 4 ≡ 800:1 and H 2 : phosphine ≡ 5 ×10 8 : 1. This reaction continues for 50 minutes.
- Phosphine and SiCl 4 are turned off, RF heating is turned off and wafers cooled in pure hydrogen.
These steps result in 26 µm N type epi-film of 0.5 ohm-cm. resistivity having 10 16 Phosphorous atoms per cc. (This process yields material in which thickness and resistivity are controlled to within ±5 percent).
0.5 ohm-cm resistivity of epitaxial film is an ideal compromise between high resistivity, required for high BV CBO and low C jc and high transit frequency. The transistor to be manufactured in this epi layer will have large BV CBO and wide frequency response.
6.4.10 Isolation Diffusion
After the epitaxial growth cycle, SiO 2 is grown over the epitaxial layer by standard oxidation process. SiO 2 film is about 5000 A° thick or 500nm. By using Mask No. 2 and photolithography process, desired windows are etched out in SiO 2 film and the wafer is ready for “isolation diffusion”.
The wafer is put in diffusion furnace and Boron (P-type) dopant atoms are diffused into the silicon wafer as described before in diffusion section. A long ‘drive-in’ is required so that B ions diffuse through the epi layer to the P type substrate. The areas that remained covered with SiO 2 are now isolated islands of N-type epitaxial Si surrounded by P-type Isolation boundaries. if reverse biased n-p junction formed around each n region and between any two n regions these junctions result in back to back diodes out of which at least one is always reverse biased no matter what polarity voltage appear between the two islands. Since B 2 O 3 (the impurity compound) is used as the diffusant source so invariably a new layer of SiO 2 grows over the diffused P-type region and pre-existing oxide over the N-epi-regions grows thicker as is evident from Figure (6.16).
6.4.11 P type diffusion for Base and Resistors
Using photo Mask No. (3) and photolithographic process, windows are etched in the existing SiO 2 layer. Boron (P-type) atoms are “driven in” to a depth of 2.7µm ( x j ) into the N-type isolated islands for forming the Base and Resistors. Here surface concentration is N s =5 x 10 18 (cm -3 ). This corresponds to sheet resistivity (R s ) 200 ohms/cm 2 where R s = ρ / x j . In the process of the diffusion , a new layer of SiO 2 is again grown over the newly diffused P-type regions and pre-existing layer become thicker .
6.4.12 N+ diffusion for Emitter and Collector Contact
Using photo Mask No. (4), by photolithographic process oxide coating is selectively etched to provide windows for Phosphorous (N-type) diffusion. Windows are etched in Emitter regions of the transistors and in Contact areas of the Collector. Why N+ diffusion is provided as Collector Contact areas? Aluminum (Al) is going to be used for making ohmic contacts to the terminals of the device and also for interconnections. Al is P type materials. Hence Al makes ohmic contact with P type region but makes rectifying contacts with N type region. This rectifying contact is also known as Metal-Semiconductor Schottky Diode. N type region should be made degenerate (semi-metal) in order to make ohmic contact with Al. Therefore N+ diffusion is provided in the contact areas of the collector which is lightly N type of the order of 10 16 Phosphorous atoms in Si epitaxial film.
Phosphorous (N type) is used for pre-deposition ( constant source diffusion) into the Si wafer. Surface concentration of N s =10 21 (cm -3 ) is maintained and diffusion depth of x j =2µm is achieved in constant source diffusion. This results in R s =2.2Ω/square = 2.2Ω/□. At this point the junction formation in the monolithic circuit is complete. In the process of diffusion a new layer of SiO 2 is formed all over the wafer.
The diffusion profile of the transistor of the monolithic circuit is given in Fig.(6.17).
Looking at the diffusion profile it is clear that E-B junction is one-sided abrupt (or step) junction and B-C junction is linearly graded junction.
6.4.13 Interconnection of the various components of the monolithic circuit.
By using mask No.5 a new set of windows are etched out in the regions of contact pads to the components.
By vacuum deposition method a thin film of Al(thickness 1000Angstrom) is deposited evenly over the entire surface of the wafer. Then by use of mask no. 6 the desired interconnection pattern between the components are formed by photolithographic processes. The undesired Al is simply etched out by the use of suitable etchant(namelt NaOH or KOH).
Next the wafers are scribed. Individual dies or chips are mounted on headers and wire from contact pads of chip are bonded to leads of the headers and hermetically sealed either as flat package or T0-5 package. All these steps have been previously described.
Thus MC-1530 is ready for customer’s use.
6.4.14 Flow-Chart of fabrication of MC-1530
The sequence of fabrication steps taken in the fabrication of MC-1530 are given in Fig.(6.19)
Figure 6.19 Flow-Chart of MC-1530 fabrication steps.